Patent Document 1 (Japanese Unexamined Patent Publication No. 09-283643) discloses a nonvolatile memory-type semiconductor device having a control gate and a floating gate, merged with a logic circuit. Said semiconductor device is formed with a plurality of separation regions of a field oxide film by a LOCOS method or the like. A memory cell and a select transistor for the memory cell are formed in an element forming region between the respective separation regions.